1. Technical Field
The present invention relates to a method for manufacturing a semiconductor device and a molded structure.
2. Related Art
Japanese Laid-open patent publication NO. 2005-216989 discloses a method for manufacturing a multi-chip module, which includes an interconnection layer forming process for forming a module interconnection layer having an insulating layer and an interconnection layer which are laminated and serves as a module interconnection board, on a temporary support board such as a silicon wafer, a molding process for sealing a plurality of semiconductor elements mounted on the module interconnection layer formed in the interconnection layer forming process with a molding resin, and a temporary support board removing process for removing the temporary support board from the body sealed with the molding resin to obtain the multi-chip module. It is described that with this configuration, it is possible to achieve a multi-layered and thin film interconnection layer as a module interconnection board on which semiconductor elements are mounted, at low cost, thereby making it possible to manufacture a thin multi-chip module.
A semiconductor wafer such as a silicon wafer is typically provided with an alignment mark such as a notch (V-shaped notch), an orientation flat and so on. Such an alignment mark allows adjustment of misalignment in a θ direction (rotational direction of a substrate) of the semiconductor wafer.